ADSM-L

AW: cache hit rate

2002-08-21 11:46:50
Subject: AW: cache hit rate
From: Stefan Holzwarth <stefan.holzwarth AT ZENTRALE.ADAC DOT DE>
To: ADSM-L AT VM.MARIST DOT EDU
Date: Wed, 21 Aug 2002 17:21:37 +0200
for our 20GB DB (75% full) we use a cache size of 393216 (regionsize 512M
for MVS Task)
we gain a hit rate of about 98 - 98,5 %
(With half of the memory we were around 97%)
Regards, Stefan Holzwarth

-----Ursprüngliche Nachricht-----
Von: Remco Post [mailto:r.post AT SARA DOT NL]
Gesendet: Mittwoch, 21. August 2002 16:34
An: ADSM-L AT VM.MARIST DOT EDU
Betreff: Re: cache hit rate


On woensdag, augustus 21, 2002, at 09:46 , Sascha Braeuning wrote:
 
> Hi all,
>
> first I've to thank all participants for the amount of answers I got on 
> my
> latest questions. Now I've got a new one which relates on the
> bufferpoolsize and the cache hit rate on OS/390 TSM-Servers.
>
> we use the following bufpoolsize:  32768
> our chache hit rate:            97,7 %
>
> I know from my training at IBM that a cache hit rate of 99 % and above  
> is
> recommended. Is it possible, that a lower cache hit rate can cause
> performance-problems? What is your experience?
>
>
> MfG
> Sascha Bräuning
>
>
> Sparkassen Informatik, Fellbach
>
> OrgEinheit: 6322
> Wilhelm-Pfitzer Str. 1
> 70736 Fellbach
>
> Telefon:   (0711) 5722-2144
> Telefax:   (0711) 5722-1630
>
> Mailadr.:  sascha.braeuning AT sparkassen-informatik DOT de
>
 
Hi,
 
a too low cache-hit rate has severe impact on performance. I guess 98%  
cache-hits or better is acceptable. Set the selftunebufsize in your 
dsmserv.opt file to allow TSM to tune the size of its cache for better  
performance (though i noticed setting it to more or less a sensible 
default to start with helps a lot...)
 
---
Met vriendelijke groeten,
 
Remco Post
 
SARA - Stichting Academisch Rekencentrum Amsterdam    http://www.sara.nl
High Performance Computing  Tel. +31 20 592 8008    Fax. +31 20 668 3167
 
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