Re: TSM and Capacity Planning
2002-04-15 13:50:23
Subject: |
Re: TSM and Capacity Planning |
From: |
"Joshua S. Bassi" <jbassi AT IHWY DOT COM> |
Date: |
Mon, 15 Apr 2002 10:37:57 -0700 |
This would definitely be true. If you look at today's processor
technology: 3 UltraSPARC chips = 1 POWER4 chip. A 32-way p690 (Regatta)
is more powerful than a 106-way E15K.
--
Joshua S. Bassi
Joshua S. Bassi
Sr. Solutions Architect @ rs-unix.com
IBM Certified - AIX/HACMP, SAN, Shark
Tivoli Certified Consultant- ADSM/TSM
Cell (415) 215-0326
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